Dynamic memory

To store bits of information operational dynamic memory is divided into cells. Each cell of dynamic memory consists: capacitor, a few transistors, and can store only one bit.

To store bits of information operational dynamic memory is divided into cells

If capacitor of dynamic memory cell is charged, the bit is turned on - in a cell is written logic one, if the capacitor is discharged - in a cell is written logic zero. To store one byte of data in the dynamic memory, need 8 cells, as 1 byte - it is 8 bits. Dynamic memory cells arranged in a grid (matrix), and each cell has an address consisting of a line number and column number. One such matrix is called a page, and a set of pages - bank.

To access the dynamic memory cell, the controller sets the bank number, page number in it, the line number and column number. All inquiries may take some time, in addition to this rather large expenditure of time is spent on opening and closing of the bank after the read-write operations.

Considering the work of the dynamic memory, it is necessary to consider another point. Capacitors can not indefinitely keep the charge, and it eventually drains. Therefore it is necessary to recharge the capacitors. Reloading operation is called regeneration. The processor does not have access to the data during the regeneration and the following appeal to the dynamic memory is only possible after recharging.

When reading the information from the dynamic memory cell is its destruction, so will overwrite the read information.

Matrix with cells arranged in parallel. This means that at a time will be read not one bit, but several. If parallel is located 8 dynamic memory matrices, it will read one byte. Number of parallel matrix determines the capacity of dynamic memory. The number of lines on which the data will be transmitted from the parallel matrix determined by the capacity IO bus dynamic memory.

Dynamic memory is controlled by a controller that is in the chipset of the motherboard - or rather, in the part, which is called the north bridge.

After processor, the operational dynamic memory can be considered as the fastest device. Therefore, the basic data exchange occurs between the CPU and the dynamic memory.

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